My research interests are primarily in the field of stochastic and unary computing, where numbers are represented in base one, as opposed to the common binary representation. The encoding makes some computations very easy, resulting in significant area-delay product, power, energy and latency of digital circuits compared to binary. The downside of pure unary computing is that it is not scalable: as the input resolution improves, hardware cost grows exponentially. To address this issue, we developed a new method of computing called the hybrid binary-unary method, which is scalable just like binary, and reduces hardware size, similar to the way unary computing helps reduce hardware costs. I am also generally interested in VLSI-CAD, with an emphasis on FPGAs. I have done FPGA physical design, reconfigurable computing, and ASIC floorplanning/placement.